P9412 Datasheet

R35DS0011EU0120 Rev.1.2

Jul.6.21

Page 15

bring the rectifier voltage back to a safe operating voltage level. The die temperature is also monitored while

simultaneously clamping the incoming energy, and if an over-temperature event occurs, an EPT is sent

immediately to the Tx unit. The clamp is released when the VRECT voltage falls below the VOVP hysteresis falling

level. If the over-voltage condition persists, an End of Power request is made to the transmitter.

3.7

Over Current, Over-Temperature Protection, and Thermal Shutdown

The P9412 reports over-current (OC) protection and over-temperature (OT) protection by sending an interrupt to

the appropriate system AP. Thermal shutdown (TSD) is also supported with “End Power Transfer” packets sent

by the P9412 to the transmitter.

The current limit level is set by firmware (FW) and is dependent upon the maximum output current needed

(typically 1.5A from the MLDO). If the main LDO (MLDO) output current exceeds the programmed current limit

(in Bypass or in Capacitor Divider operating mode) then an OC condition exists and an interrupt is sent to the

AP. The MLDO will attempt to limit the output current to the over-current set point by reducing the output voltage

proportionally to the amount of current being consumed above the OCP limit. Operating the P9412 in OCP mode

will cause CPOUT and VOUT to decrease which will create a voltage difference between Vrect and VOUT and

the device temperature will increase. In order to limit the die temperature in over-current conditions, the P9412

may reduce the Vrect target to track VOUT and may send an EPT command to Tx if over-current condition

exceeds 0.5s. The host AP is expected to react to the Over-Current interrupt by reducing the load applied to the

P9412 immediately. When the output voltage is greater than 15V, over-current conditions can result in rapid heat

development and high voltage events which must be limited in time and magnitude to prevent operation under

high temperature or prevent exposure to high voltages. The load applied to the P9412 should not be completely

removed if on OCP event is active, the load should be reduced to a level within the safe operating output current

range. It is recommended that the load reductions should be done in steps (approximately 100mA or 250mA)

every 10ms to prevent voltage overshoots caused by rapid load decreases.

The internal device temperature is monitored, and the P9412 reports an over-temperature (OT) condition

interrupt to the AP if the temperature exceeds 130°C (typical, internally fixed threshold). The P9412 will generate

another interrupt when the temperature falls below the hysteresis level. If the temperature exceeds 140°C

(typical), a thermal shutdown (TSD) condition exists and the P9412 will start sending “End Power Transfer”

packets with an “over-temperature condition” code until the transmitter stops the power transfer. Power transfer

will resume when the transmitter reapplies the ping and the process will repeat.

3.8

Enable Input

The P9412 can be disabled by applying a logic high to the nEN pin. When the nEN pin is pulled high, the device

is suspended and placed in low current (sleep) mode. If pulled low, the device is active. The P9412 should not

be disabled at any time during power transfer. In order to use the /EN pin function, wireless power should be

terminated via an EPT command, then once power is removed, /EN high can be asserted.

3.9

LDO Regulators

The P9412 has three LDOs, Main LDO (MLDO) and LDO5P0 are powered by VRECT. LDO1P8 is powered by

LDO5P0. Both LDO5P0 and LDO1P8 are used to supply power to internal low voltage blocks. The Main LDO

output, VOUT, is programmable from 5V to 20V. The LDOs must have local ceramic bypass capacitors placed

near the P9412 on the PCB.

3.10

Capacitor Divider

The capacitor divider voltage regulator is a constant frequency (programmable fixed frequency), open-loop

switched capacitor divider suitable for high-power and high-voltage applications. In steady state operation, the

integrated N-channel MOSFETs are synchronously operated with 50% duty cycle at the pre-programmed

switching frequency, and the output voltage is provided at the CPOUT pin. The capacitor divider will output ½ the

voltage on VOUT at twice the output current supplied by VOUT. A minimum number of external components are

required for proper operation.