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ISO721 Datenblatt(PDF) 12 Page - Texas Instruments |
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ISO721 Datenblatt(HTML) 12 Page - Texas Instruments |
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12 / 22 page ![]() www.ti.com IEC SAFETY LIMITING VALUES 0 75 50 25 100 125 150 175 200 0 50 100 150 200 Case Temperature C o − V = 3.6 V, CC1 V = 3.6 V CC2 V = 5.5 V, CC1 V = 5.5 V CC2 ISO721, ISO721M ISO722, ISO722M SLLS629B – JANUARY 2006 – REVISED MAY 2006 Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the IO can allow low resistance to ground or the supply, and without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier, potentially leading to secondary system failures. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT θ JA = 263°C/W, VI = 5.5 V, TJ = 170°C, TA = 25°C 100 IS Safety input, output, or supply current mA θ JA = 263°C/W, VI = 3.6 V, TJ = 170°C, TA = 25°C 153 TS Maximum case temperature 150 °C The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The junction-to-air thermal resistance in the Thermal Characteristics table is that of a device installed in the JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages and is conservative. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. THERMAL CHARACTERISTICS (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Low-K Thermal Resistance(1) 263 °C/W θ JA Junction-to-Air High-K Thermal Resistance(1) 125 °C/W Junction-to-Board Thermal θ JB 44 °C/W Resistance Junction-to-Case Thermal θ JC 75 °C/W Resistance VCC1 = VCC2 = 5.5 V, TJ = 150°C, ISO72x CL = 15 pF, Input a 100 Mbps 50% duty 159 cycle square wave PD Device Power Dissipation mW VCC1 = VCC2 = 5.5 V, TJ = 150°C, ISO72xM CL = 15 pF, Input a 150 Mbps 50% duty 195 cycle square wave (1) Tested in accordance with the Low-K or High-K thermal metric definition of EIA/JESD51-3 for leaded surface mount packages. Figure 7. θ JC THERMAL DERATING CURVE per IEC 60747-5-2 12 Submit Documentation Feedback |
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