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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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STM32F103CBU6XXX Datenblatt(PDF) 67 Page - STMicroelectronics |
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STM32F103CBU6XXX Datenblatt(HTML) 67 Page - STMicroelectronics |
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67 / 116 page  DS5319 Rev 18 67/116 STM32F103x8, STM32F103xB Electrical characteristics 115 Figure 31. Recommended NRST pin protection 2. The reset network protects the device against parasitic resets. 3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 38, otherwise the reset is not taken into account by the device. 5.3.15 TIM timer characteristics The parameters given in Table 39 are specified by design, not tested in production. Refer to Section 5.3.12 for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). ai14132d STM32 RPU NRST(2) VDD Filter Internal Reset 0.1 μF External reset circuit (1) Table 39. TIMx(1) characteristics 1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers. Symbol Parameter Conditions Min Max Unit tres(TIM) Timer resolution time -1 - tTIMxCLK fTIMxCLK = 72 MHz 13.9 - ns fEXT Timer external clock frequency on CH1 to CH4 -0 fTIMxCLK/2 MHz fTIMxCLK = 72 MHz 036 MHz ResTIM Timer resolution - - 16 bit tCOUNTER 16-bit counter clock period when internal clock is selected - 1 65536 tTIMxCLK fTIMxCLK = 72 MHz 0.0139 910 µs tMAX_COUNT Maximum possible count - - 65536 × 65536 tTIMxCLK fTIMxCLK = 72 MHz -59.6 s |
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