LP5552

Management Unit

General Description

The LP5552 is a PWI 2.0 compliant Energy Management

System for reducing power consumption of stand-alone mo-

bile phone processors such as base-band or applications

processors.

The LP5552 contains two advanced, digitally controlled

switching regulators for supplying variable voltage to proces-

sor core and memory. The device also incorporates 5 pro-

grammable LDO regulators for powering I/O, peripheral logic

blocks, maintaining memory retention (dual-domains) in

shutdown mode, and auxillary functions.

The device is controlled via the PWI 2.0 open-standard

interface. The LP5552 operates cooperatively with Power-

Wise technology compatible processors to optimize supply

voltages adaptively over process and temperature variations

(adaptive voltage scaling) or dynamically using frequency/

voltage pre-characterized look-up tables (dynamic voltage

scaling).

Features

n

Two 800 mA buck regulators operate 180 degrees out of

phase for reduced EMI

n

3.6 MHz PWM switching frequency

n

Five programmable LDOs ideal for I/O , PLL, and

memory retention supply generation.

n

Supports high-efficiency PowerWise Technology

Adaptive Voltage Scaling

n

PWI 2.0 open standard interface for system power

management

n

Digitally controlled intelligent voltage scaling

n

Auto or PWI controlled PFM mode transition

n

Internal soft start/startup sequencing.

n

Power OK output.

Applications

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Dual core processors

n

GSM/GPRS/EDGE & UMTS cellular handsets

n

Hand-held radios

n

PDAs

n

Battery powered devices

n

Portable instruments

System Diagram

20210301

FIGURE 1. System Diagram

ADVANCE INFORMATION

September 2006

© 2006 National Semiconductor Corporation

DS202103

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