6.42

4

71V67703, 71V67903, 256K x 36, 512K x 18, 3.3V Synchronous SRAMS with

3.3V I/O, Flow-Through Outputs, Single Cycle Deselect

Commercial and Industrial Temperature Ranges

Aug.11.21

Pin Configuration – 256K x 36, PKG100(3)

Top View

NOTES:

1. Pin 14 does not have to be directly connected to VSS as long as the input voltage is < VIL.

2. Pin 64 can be left unconnected and the device will always remain in active mode.

3. This text does not indicate orientation of actual part-marking.

100 99 98 97 96 95 94 93 92 91 90

87 86 85 84 83 82 81

89 88

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

I/OP4

I/O31

I/O30

VDDQ

VSS

I/O29

I/O28

I/O27

I/O26

VSS

VDDQ

I/O25

I/O24

VSS(1)

VDD

I/O23

I/O22

VDDQ

VSS

I/O21

I/O20

I/O19

I/O18

VSS

VDDQ

I/O17

I/O16

I/OP3

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

I/OP2

I/O14

VDDQ

VSS

I/O13

I/O12

I/O11

I/O10

VSS

VDDQ

I/O9

I/O8

VSS

NC

VDD

ZZ(2)

I/O7

I/O6

VDDQ

VSS

I/O5

I/O4

I/O3

I/O2

VSS

VDDQ

I/O1

I/O0

I/OP1

VSS

I/O15

5309 drw 02a

,

NC

71V67703

PKG100