STWBC86 datasheet(26/40 Pages) STMICROELECTRONICS

26 / 40 page

Address

R/W

Default

Description

0x00E2

TX configuration

0x03

Bits [7…0] :TX CE TO MAX

Max count TX retries with different frequency after

failing to listen to CE packet within time frame.

0x00E3

0x0F(1920Hz)

Bits [7…0] : TX FHOP

Define the step size (in Hz) for every frequency hop.

Internally it is multiplied with 128 1: 128Hz step size 2:

256Hz step size 3: 384Hz step size ….

0x00E4

0x00

Bits [7…0]:TX PID MAX CURR

TX max current for PID control target in units of 16mA.

0 - not limited

1 - 16mA ...

255 - 4080mA

Table 17. TX EPT reason

Address

R/W

Default

Description

0x00E6

TX EPT reason Byte 0

Bit 0:TX OVP

over voltage triggered

Bit 1: TX OCP

over current protection triggered

Bit 2: TX OVTP

over temperature protection triggered

Bit 3: TX FOD

Foreign object detected

Bit4: TX HOST

Host issued EPT command

Bit5: TX RX EPT

EPT Source Rx EPT packet

Bit6: TX CEP TO

Control error packet timeout

Bit7: TX RPP TO

Received power packet timeout

0x00E7

TX EPT reason Byte 1

Bit0: TX RX RST

Rx send SS/ID/CFG at wrong time , probably because of

RX RESET

Bit1:TX SYS ERR

System error

Bit2: TX SS TO

Signal strength timeout , Ping time out.

Bit3: TX SS ERR

Signal strength packet error

Bit4: TX ID ERR

Identification packet error

Bit 5: TX CFG

STWBC86

I2C register

map

DS14079 - Rev 1

page 26/40

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