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85408BGLF Datenblatt(PDF) 5 Page - Renesas Technology Corp |
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85408BGLF Datenblatt(HTML) 5 Page - Renesas Technology Corp |
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5 / 17 page ![]() LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK 5 Rev C 1/5/15 85408 DATA SHEET Table 4D. LVDS DC Characteristics, VDD = 3.3V ± 5%, TA = 0°C to 70°C Table 5. AC Characteristics, VDD = 3.3V ± 5%, TA = 0°C to 70°C NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE: All parameters measured at f 622MHz unless noted otherwise. NOTE 1: Measured from the differential input crossing point to the differential output crossing point. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential crossing point of the input to the differential output crossing point. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. NOTE 5: These parameters are guaranteed by characterization. Not tested in production. Symbol Parameter Test Conditions Minimum Typical Maximum Units VOD Differential Output Voltage RL = 100 250 400 600 mV V OD VOD Magnitude Change RL = 100 50 mV VOS Offset Voltage RL = 100 1.125 1.4 1.6 V V OS VOS Magnitude Change RL = 100 50 mV IOz High Impedance Leakage -10 +10 µA IOFF Power Off Leakage -1 +1 µA IOSD Differential Output Short Circuit Current -5.5 mA IOS/IOSB Output Short Circuit Current -12 mA Symbol Parameter Test Conditions Minimum Typical Maximum Units fMAX Output Frequency 700 MHz tPD Propagation Delay; NOTE 1 1.6 2.4 ns tjit Buffer Additive Phase Jitter, RMS; refer to Additive Phase Jitter Section 156.25MHz, Integration Range: (12kHz – 20MHz) 167 fs tsk(o) Output Skew; NOTE 2, 4 50 ps tsk(pp) Part-to-Part Skew; NOTE 3, 4 550 ps tR / tF Output Rise/Fall Time 20% to 80% 50 600 ps odc Output Duty Cycle 45 55 % tPZL, tPZH Output Enable Time; NOTE 5 5ns tPLZ, tPHZ Output Disable Time; NOTE 5 5ns |
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