74F525SCX datasheet(2/10 Pages) NSC

2 / 10 page

Logic Symbol

TLF9547 – 1

Unit LoadingFan Out

74F

Pin Names

Description

Input IIH IIL

HIGHLOW

Output IOH IOL

Ouput (Primarily indicates when

50333

1 mA20 mA

the counter has reached zero)

Output (Divides Q by 2)

50333

1 mA20 mA

M0–M2

Status Inputs

1010

20 mA b06 mA

Master Reset

1010

20 mA b06 mA

Clock Pulse

1020

20 mA b12 mA

D0–D15

Data Inputs

1010

20 mA b06 mA

Write Enable Input

1010

20 mA b06 mA

XTR

External Trigger Input

1020

20 mA b12 mA

XTAL

Crystal Output

1010

20 mA b06 mA

Functional Description

The multi-function aspect of the device consists of eight

different modes of operation An explanation of the opera-

tion of the device in each of the modes follows However

there is one operation that is independent of the selected

mode the loading of data Data is latched into a set of data

latches when WE is brought from a LOW to a HIGH state

The latches are transparent when WE is held LOW

Operation Notes

1 Device should be reset before operation

2 The XTR input acts as a select line for the clock

3 With XTR low the clock goes into the counter

4 With XTR high the clock loads the counter

5 In mode 4 and 5 during counting the counter cannot be

reloaded XTR high freezes the count

6 Mode 7 is the only auto-reload mode all other modes

require and XTR pulse to begin

7 Loading 0 into the latches idles the device

MODE 0 Interval Timer with Level Output

While XTR is HIGH the data in the data latches is loaded

into the counter upon the next positive edge of CP The

negative edge of XTR enables the count-down to begin with

the next positive edge of CP When the count reaches zero

Q normally LOW is brought HIGH and Q2 toggles state

Taking XTR HIGH at any time enables the data in the data

latches to be loaded into the counter on the rising edge of

CP and clears Q See

Figure 1

MODE 1 Interval Timer with Inverted Level Output

The operation is exactly the same as in Mode 0 except that

Q is normally HIGH and goes LOW when the count reaches

zero Q2 toggles on the negative-edge of Q See

Figure 1

MODE 2 Interval Timer with Pulse Output

While XTR is HIGH the data in the data latches is loaded

into the counter upon the next positive edge of CP The

negative edge of XTR enables the count-down to begin with

the next positive edge of CP When the count reaches zero

Q normally LOW is brought HIGH for a single period of CP

Q2 toggles state on the positive edge of Q Taking XTR

HIGH at any time causes the data in the data latches to be

loaded into the counter on the rising edge of CP and clears

Q See

Figure 2

MODE 3 Interval Timer with Inverted Pulse Output

The operation is exactly the same as in Mode 2 except that

Q is normally HIGH and goes LOW for a single period of CP

Q2 toggles on the negative edge of Q See

Figure 2

74F525SCX Datenblatt(PDF) 2 Page - National Semiconductor (TI)

74F525SCX Datenblatt(HTML) 2 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10

Datenblatt Download

Link URL