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FXPS7115D4S Datenblatt(PDF) 49 Page - NXP Semiconductors

Teilenummer FXPS7115D4S
Bauteilbeschribung  Digital absolute pressure sensor, 40 kPa to 115 kPa
PDF  72 Pages
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Hersteller  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXPS7115D4S Datenblatt(HTML) 49 Page - NXP Semiconductors

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NXP Semiconductors
FXPS7115D4S
Digital absolute pressure sensor, 40 kPa to 115 kPa
7.7.25 Part number register (address C4h, C5h)
The part number registers are factory programmed OTP registers that include the numeric portion of the device
part number. These registers are included in the factory programmed OTP array error detection. These registers
are readable in SPI mode or I2C mode when ENDINIT is not set.
Bit
7
6
5
4
3
2
1
0
Symbol
PN0[7:0]
Reset
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Access
R
R
R
R
R
R
R
R
Table 89. PN0 Register (address C4h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
PN1[7:0]
Reset
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Access
R
R
R
R
R
R
R
R
Table 90. PN1 Register (address C5h) bit allocation
7.7.26 Device serial number registers
The serial number registers are factory programmed OTP registers that include the unique serial number of
the device. Serial numbers begin at 1 for all produced devices in each lot and are sequentially assigned. Lot
numbers begin at 1 and are sequentially assigned. No lot contains more devices than can be uniquely identified
by the 14-bit serial number. Depending on lot size and quantities, all possible lot numbers and serial numbers
might not be assigned. These registers are included in the factory programmed OTP array error detection.
These registers are readable in SPI mode or I2C mode when ENDINIT is not set.
Bit
7
6
5
4
3
2
1
0
Symbol
SN[7:0]
Reset
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Access
R
R
R
R
R
R
R
R
Table 91. SN0 Register (address C6h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
SN[7:0]
Reset
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Access
R
R
R
R
R
R
R
R
Table 92. SN1 Register (address C7h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
SN[7:0]
Reset
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Access
R
R
R
R
R
R
R
R
Table 93. SN2 Register (address C8h) bit allocation
FXPS7115D4S
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Objective data sheet
Rev. 1.2 — 28 June 2023
49 / 72



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