CDB42406 datasheet(9/32 Pages) CIRRUS

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CDB42406

1.7.2b

Setup 4

Using the on-board crystal oscillator, AUDIO MCLK, a DSP connected to DSP I/O HDR

masters the subclocks for the ADC/DAC. For implementation of this setup option, set DIP

switch S4 (SW[3:0]) to ‘0100’b.

1.7.2c

Setup 5

Using the master clock from an external DSP connected to the DSP I/O HDR,

DSP_MCLK, the CS42406 ADC masters the subclocks and data for the DAC. For imple-

mentation of this setup option, set DIP switch S4 (SW[3:0]) to ‘0101’b.

AUDIO

MCLK

DAC_LRCK/

DAC_SC LK

A DC_LRCK/

A DC_SCLK

DAC_SD IN x

ADC_SDO UT

CS42406

DSP I/O

HDR

DS P_M CLK

DSP_A DC_LR CK/

DSP_ADC _S CLK

D SP_SDO UT

DSP_DA C_LR CK/

DSP_DAC _S CLK

DSP_SDINx

CS8406

CS8416

RMC K

OM CK

O LRCK/

OSCLK

SDO UT

OM CK

ILR CK/

IS CLK

SDIN

Figure 5. Digital Loopback - Setup 4

AU DIO

MCLK

MC LK

DAC_LRCK/

DAC_SC LK

ADC_L RCK/

ADC_SC LK

DAC_SD INx

AD C_ SDO U T

CS42406

DSP I/O

HD R

DSP_ MC LK

DSP_ ADC_L RCK/

DSP_ ADC_SC LK

D SP_SDO U T

DSP_ DAC_L RCK/

DSP_ DAC_SC LK

D SP_SD IN x

CS8406

C S8416

RM CK

OMC K

OL RC K/

OSC LK

SDO U T

OM CK

IL RC K/

ISC LK

SD IN

Figure 6. Digital Loopback - Setup 5

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