BST82 datasheet(2/12 Pages) PHILIPS

2 / 12 page

April 1995

Philips Semiconductors

Product speciﬁcation

N-channel enhancement mode vertical

D-MOS transistor

BST82

DESCRIPTION

N-channel enhancement mode

vertical D-MOS transistor in SOT23

envelope and designed for use as

Surface Mounted Device (SMD) in

thin and thick-film circuits for

telephone ringer and for application

with relay, high-speed and

line-transformer drivers.

FEATURES

• Direct interface to C-MOS, TTL,

etc.

• High-speed switching

• No second breakdown

• Low R

DS(on)

QUICK REFERENCE DATA

PINNING - SOT23

Drain-source voltage

VDS

max.

80 V

Drain-source voltage (non-repetitive peak;

tp ≤ 2 ms)

VDS(SM)

max.

100 V

Gate-source voltage (open drain)

±V

GSO

max.

20 V

Drain current (DC)

max.

175 mA

Total power dissipation up to Tamb =25 °CPtot

max.

300 mW

Drain-source ON-resistance

typ.

max.

Ω

ID = 150 mA; VGS =5 V

RDS(on)

Transfer admittance

ID = 175 mA; VDS =5 V

 Yfs

typ.

150 mS

= gate

= source

= drain

PIN CONFIGURATION

handbook, 2 columns

MBB076 - 1

Fig.1 Simplified outline and symbol.

Marking: 02p

handbook, halfpage

MSB003

Top view

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