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74LVC2G126DP Datenblatt(PDF) 2 Page - Nexperia B.V. All rights reserved |
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74LVC2G126DP Datenblatt(HTML) 2 Page - Nexperia B.V. All rights reserved |
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2 / 17 page ![]() Nexperia 74LVC2G126 Dual bus buffer/line driver; 3-state 3. Ordering information Table 1. Ordering information Package Type number Temperature range Name Description Version 74LVC2G126DP -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC2G126DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC2G126GT -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC2G126GF -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1 × 0.5 mm SOT1089 74LVC2G126GN -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.2 × 1.0 × 0.35 mm SOT1116 74LVC2G126GS -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm SOT1203 4. Marking Table 2. Marking codes Type number Marking code [1] 74LVC2G126DP V26 74LVC2G126DC V26 74LVC2G126GT V26 74LVC2G126GF VN 74LVC2G126GN VN 74LVC2G126GS VN [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 001aah787 2A 1A 2OE 1OE 1Y 2Y Fig. 1. Logic symbol mna234 nOE nA nY Fig. 2. Logic diagram (one gate) 74LVC2G126 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 15 — 28 April 2020 2 / 17 |
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