LM339LVDR datasheet(29/63 Pages) TI1

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100 NŸ

10 NŸ

51 NŸ

10 0Ÿ

10 NŸ

10 0Ÿ

10 NŸ

10 0Ÿ

51 NŸ

100 NŸ

Input

Gating

Signal

VIN

Open

Drain

Output

+VLOGIC2

RPU

+VLOGIC3

RPU

+VLOGIC1

RPU

RPU not required if using

push-pull output devices

t0 t1

Figure 8-13. Time Delay Generator

Consider the case of VIN = 0. The output of comparator 4 is also at ground, "shorting" the capacitor and holding

it at 0V. This implies that the outputs of comparators 1, 2, and 3 are also at 0V. When an input signal is applied,

the output of open drain comparator 4 goes High-Z and C charges exponentially through R. This is indicated in

the graph. The output voltages of comparators 1, 2, and 3 switch to the high state in sequence when VC rises

above the reference voltages V1, V2 and V3. A small amount of hysteresis has been provided by the 10 kΩ and

10 MΩ resistors to insure fast switching when the RC time constant is chosen to give long delay times. A good

starting point is R = 100 kΩ and C = 0.01 µF to 1 µF.

All outputs will immediately go low when VIN falls to 0V, due to the comparator output going low and immediately

discharging the capacitor.

Comparator 4 must be a open-drain type output (TLV902x), whereas comparators 1 though 3 may be either

open drain or push-pull output, depending on system requirements. RPU is not required for push-pull output

devices.

8.2.5 Logic Level Shifter

The output is the uncommitted drain of the output transistor. Many open-drain outputs can be tied together to

provide an output OR'ing function if desired.

VCC

Logic

Out

VLOGIC

RPULLUP

VLOGIC

Logic

10 kŸ

VCC

Open

Drain

Output

Figure 8-14. Universal Logic Level Shifter

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TL331LV, TL391LV, LM393LV, LM339LV

SNOSDA4C – JUNE 2020 – REVISED MARCH 2023

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