EB201/D

http://onsemi.com

7

Table 2. Relative Size of On–Resistance Components

On–Resistance

Component

1000 V

Standard MOSFET

250 V

Standard MOSFET

50 V

Standard MOSFET

50 V, High Cell Density

MOSFET

Channel

0.4%

5.1%

40.5%

20.3%

Accumulation

0.1%

1.6%

12.6%

5.5%

JFET

8.3%

19.1%

12.7%

16.3%

EPI

91.1%

72.5%

20.1%

34.2%

Substrate

0.1%

1.7%

14.1%

23.7%

SMARTDISCRETES

E Features on HDTMOS Devices

The

HDTMOS

process

is

compatible

with

ON

Semiconductor’s

SMARTDISCRETES

process.

The

features available in the SMARTDISCRETES process

include SENSEFET

™s, gate–source Zener protection,

gate–drain

Zener

clamps

for

self

clamping

of

drain–to–source transients, and over current limits. Also,

there is the potential for fault flags and overtemperature

shutdown. Of these features gate–source protection Zeners

are the most likely option to be used in HDTMOS. Adding

the Zeners has little impact on die size and processing

complexity. Series gate resistors can be added to enhance the

gate’s ESD capability and to limit the maximum switching

speeds so that RFI and EMI are bounded.

The wisdom of adding other SMARTDISCRETES

features is questionable. SENSEFETs are not likely since it

is difficult to generate measurable and accurate sense

voltages with a very low on–resistance device. Adding an

overcurrent limit is unlikely since the feature requires a

resistor placed in series with the source, which runs contrary

to all the reasons for selecting high cell density in the first

place. Overtemperature shutdown and self clamping of

voltage transients at the drain are envisioned as features for

specialized devices and not for the entire product line.

Voltage Ratings

High cell density MOSFETs are limited in the range of

voltages that they serve. There are few high current

applications requiring voltages below 12 V, so that defines

one end of the HDTMOS voltage spectrum. Presently, the

other end of the voltage range is at best 100 V and possibly

only 60 V. As the MOSFET’s breakdown voltage increases,

more of the on–resistance appears in the epitaxial region,

whose resistivity and thickness increase with voltage (Table

2). Consequently, improving the on–resistance of the cells

on the surface of the chip has a diminishing effect as voltage

increases. Sixty volt devices will serve the automotive and

industrial markets, while 30 V devices will be used in the

computer and portable tools industries.

P–Channels

P–channel devices benefit from high cell densities, too.

The performance of P–channel MOSFETs have always

trailed that of their N–channel counterparts since they

inherently have about three times the on–resistance. But

cutting on–resistance area product by a factor of two

broadens the range of applications serviceable by

P–channels too. Of special interest are 20 V devices in the

SO–8 package, where a single logic level P–channel has an

on–resistance rating of 70 m

Ω, and a dual would be rated at

140 m

Ω each. Current plans are to introduce a 30 V

P–channel in the DPAK, which would have an on–resistance

rating in the range of 100 m

Ω. The new P–channels hold

great promise for use in laptop computers and in computer

peripherals. Their gate drives are especially efficient since

they do not require the charge pump that the N–channel

devices need.