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CR8F612X Datenblatt(PDF) 7 Page - STMicroelectronics

Teilenummer CR8F612X
Bauteilbeschribung  16 MHz CR8F 8-bit MCU, up to 8 Kbytes Flash, 1 Kbyte RAM,640 bytes EEPROM,10-bit ADC, 2 timers, UART, SPI, I²C
PDF  89 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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CR8F612X Datenblatt(HTML) 7 Page - STMicroelectronics

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CR8F612X
List of figures
Doc ID 15590 Rev 1
7/88
List of figures
Figure 1.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 2.
Flash memory organisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 3.
CR8F612X VFQFPN32/LQFP32 pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 4.
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 5.
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 6.
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 7.
fCPUmax versus VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 8.
External capacitor CEXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 9.
Typ IDD(RUN) vs. VDD HSE user external clock, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . 52
Figure 10.
Typ IDD(RUN) vs. fCPU HSE user external clock, VDD = 5 V . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 11.
Typ IDD(RUN) vs. VDD HSI RC osc, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 12.
Typ IDD(WFI) vs. VDD HSE user external clock, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . 53
Figure 13.
Typ IDD(WFI) vs. fCPU HSE user external clock, VDD = 5 V . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 14.
Typ IDD(WFI) vs. VDD HSI RC osc, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 15.
HSE external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 16.
HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 17.
Typical HSI accuracy at VDD = 5 V vs 5 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 18.
Typical HSI frequency variation vs VDD @ 4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 19.
Typical LSI frequency variation vs VDD @ 4 temperatures. . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 20.
Typical VIL and VIH vs VDD @ 4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 21.
Typical pull-up resistance vs VDD @ 4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 22.
Typical pull-up current vs VDD @ 4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 23.
Typ. VOL @ VDD = 3.3 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 24.
Typ. VOL @ VDD = 5 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 25.
Typ. VOL @ VDD = 3.3 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 26.
Typ. VOL @ VDD = 5 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 27.
Typ. VOL @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 28.
Typ. VOL @ VDD = 5 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 29.
Typ. VDD - VOH @ VDD = 3.3 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 30.
Typ. VDD - VOH @ VDD = 5 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 31.
Typ. VDD - VOH @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 32.
Typ. VDD - VOH @ VDD = 5 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 33.
Typical NRST VIL and VIH vs VDD @ 4 temperatures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 34.
Typical NRST pull-up resistance vs VDD @ 4 temperatures. . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 35.
Typical NRST pull-up current vs VDD @ 4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 36.
Recommended reset pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 37.
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 38.
SPI timing diagram - slave mode and CPHA = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 39.
SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 40.
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 41.
Typical application with ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 42.
32-pin low profile quad flat package (7 x 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Figure 43.
32-lead very thin fine pitch quad flat no-lead package (5 x 5) . . . . . . . . . . . . . . . . . . . . . . 80
Figure 44.
Recommended footprint for on-board emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 45.
Recommended footprint without on-board emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 46.
CR8F612X ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84



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