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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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ES9039SPRO Datenblatt(PDF) 42 Page - ESS Technology,Inc |
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ES9039SPRO Datenblatt(HTML) 42 Page - ESS Technology,Inc |
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42 / 95 page  ES9039MPRO & ES9039PRO Product Brief CONFIDENTIAL ADVANCE INFORMATION 0.2.1 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM 42 Register 4: CLOCK CONFIG Bits [7:0] Default 8'd7 Bits Mnemonic Description [7:0] MASTER_BCK_DIV Master mode clock divider. Whole number divide value + 1 for CLK_Master (SYS_CLK/divide_value). Register 5: CLK GEAR SELECT Bits [7:6] [5:4] [3] [2] [1:0] Default 2'b00 2'd0 1'b0 1'b0 2'b00 Bits Mnemonic Description [7:6] RESERVED NA [5:4] SEL_CLK_GEAR Clock Gearing • 2'd0: SYS_CLK/1 • 2'd1: SYS_CLK/2 • 2'd2: SYS_CLK/4 • 2'd3: SYS_CLK/8 [3] RESERVED NA [2] AUTO_CLK_GEAR • 1'b0: Disable automatic clock gearing. SYS_CLK = SEL_CLK_GEAR • 1'b1: Enable automatic clock gearing. SYS_CLK will increase up to SEL_CLK_GEAR [1:0] RESERVED NA Register 9-7: RESERVED |
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