PCF8570P datasheet(10/20 Pages) PHILIPS

10 / 20 page

1999 Jan 06

Philips Semiconductors

Product speciﬁcation

256

× 8-bit static low-voltage RAM with

I2C-bus interface

PCF8570

12 AC CHARACTERISTICS

All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and

VIH with an input voltage swing of VSS to VDD.

Note

1. A detailed description of the I2C-bus specification, with applications, is given in brochure

“The I2C-bus and how to

use it”. This brochure may be ordered using the code 9398 393 40011.

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

I2C-bus timing (see Fig.10; note 1)

fSCL

SCL clock frequency

−−

100

kHz

tSP

tolerable spike width on bus

−−

100

tBUF

bus free time

4.7

−−µs

tSU;STA

START condition set-up time

4.7

−−µs

tHD;STA

START condition hold time

4.0

−−µs

tLOW

SCL LOW time

4.7

−−µs

tHIGH

SCL HIGH time

4.0

−−µs

SCL and SDA rise time

−−

1.0

µs

SCL and SDA fall time

−−

0.3

µs

tSU;DAT

data set-up time

250

−−

tHD;DAT

data hold time

−−

tVD;DAT

SCL LOW-to-data out valid

−−

3.4

µs

tSU;STO

STOP condition set-up time

4.0

−−µs

Fig.10 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.

handbook, full pagewidth

PROTOCOL

SCL

SDA

MBD820

BIT 0

LSB

(R/W)

t HD;STA

SU;DAT

HD;DAT

VD;DAT

t SU;STO

BUF

SU;STA

LOW

t HIGH

1 / f SCL

START

CONDITION

(S)

BIT 7

MSB

(A7)

BIT 6

(A6)

ACKNOWLEDGE

(A)

STOP

CONDITION

(P)

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