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ZXLD1350 Datenblatt(PDF) 18 Page - Zetex Semiconductors |
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ZXLD1350 Datenblatt(HTML) 18 Page - Zetex Semiconductors |
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18 / 24 page ![]() ZXLD1350 Issue 6 - April 2007 18 www.zetex.com © Zetex Semiconductors plc 2007 Reducing output ripple Peak to peak ripple current in the LED can be reduced, if required, by shunting a capacitor Cled across the LED(s) as shown below: A value of 1 F will reduce nominal ripple current by a factor three (approx.). Proportionally lower ripple can be achieved with higher capacitor values. Note that the capacitor will not affect operating frequency or efficiency, but it will increase start-up delay, by reducing the rate of rise of LED voltage. Operation at low supply voltage The internal regulator disables the drive to the switch until the supply has risen above the start- up threshold (VSU). Above this threshold, the device will start to operate. However, with the supply voltage below the specified minimum value, the switch duty cycle will be high and the device power dissipation will be at a maximum. Care should be taken to avoid operating the device under such conditions in the application, in order to minimize the risk of exceeding the maximum allowed die temperature. (See next section on thermal considerations). Note that when driving loads of two or more LEDs, the forward drop will normally be sufficient to prevent the device from switching below approximately 6V. This will minimize the risk of damage to the device. Thermal considerations When operating the device at high ambient temperatures, or when driving maximum load current, care must be taken to avoid exceeding the package power dissipation limits. The graph below gives details for power derating. This assumes the device to be mounted on a 25mm2 PCB with 1oz copper standing in still air. VIN VIN ISENSE LX ZXLD1350 Rs L1 Cled LED D1 n o i t a p i s s i D r e w o P m u m i x a M 0 0 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 3 1 0 1 1 0 9 0 7 0 5 0 3 0 1 0 1 - 0 3 - 0 5 - ) C g e D ( e r u t a r e p m e T t n e i b m A |
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