TCS34001FN datasheet(21/35 Pages) OSRAM

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[v2-00] 2023-Feb-09

TCS3400 − Register Description

ID Register (ID 0x92)

The read-only ID register provides the device identification.

Figure 29:

ID Register

Status Register (STATUS 0x93)

The read-only Status Register provides the internal status of the

device.

Figure 30:

Status Register

VID

Field

Bits

Description

7:2

Device Identification = 100100

VID

1:0

00b for TCS34001 & TCS34005

11b for TCS34003 & TCS34007

ASAT

Reserved

AINT

Reserved

AVALID

Field

Bits

Description

ASAT

ALS Saturation. When asserted, the analog sensor was at the upper

end of its dynamic range. The bit can be de-asserted by sending a clear

channel interrupt command (0xE6 CICLEAR) or by disabling the ALS

ADC (AEN=0). ATIME and AGAIN are controls that can be adjusted to set

when saturation happens. This bit triggers an interrupt if ASIEN in AUX

is set.

Reserved

6:5

Reserved.

AINT

ALS Interrupt. If AEN is set, indicates that an ALS event that met the

programmed ALS thresholds (AILT or AIHT) and persistence (APERS)

occurred.

Reserved

3:1

Reserved.

AVALID

RGBC Valid. Indicates that the RGBC cycle has completed since AEN

was asserted.

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