TSL25713 datasheet(17/39 Pages) OSRAM

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Page 16

ams Datasheet

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[v1-01] 2018-Mar-27

State Diagram

Figure 18 shows a more detailed flow for the state machine. The

device starts in the sleep mode. The PON bit is written to enable

the device. A 2.72-ms delay will occur before entering the start

state.

If the WEN bit is set, the state machine will then cycle through

the wait state. If the WLONG bit is set, the wait cycles are

extended by 12× over normal operation. When the wait counter

terminates, the state machine will step to the ALS state.

The AEN should always be set. In this case, a minimum of 1

integration time step should be programmed. The ALS state

machine will continue until it reaches the terminal count at

which point the data will be latched in the ALS register and the

interrupt set, if enabled.

Figure 18:

Expanded State Diagram

PON = 1

PON = 0

Sleep

ALS

Check

Wait

Check

Start

Wait

WEN = 1

ALS

1 to 256 steps

Step: 2.72 ms

Time: 2.72 ms − 696 ms

120 Hz Minimum − 8 ms

100 Hz Minimum − 10 ms

WLONG = 0

1 to 256 steps

Step: 2.72 ms

Time: 2.72 ms − 696 ms

Minimum − 2.72 ms

WLONG = 1

1 to 256 steps

Step: 32.64 ms

Time: 32.64 ms − 8.35 s

Minimum − 32.64 ms

ALS

Delay

AEN = 1

2.72 ms

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