AD9910SLASHPCBZ datasheet(57/60 Pages) AD

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AD9910

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I/O Update Rate Register

Address 0x04, 4 bytes are assigned to this register. This register is effective without the need for an I/O update.

Table 21. Bit Descriptions for I/O Update Rate Register

Bit(s)

Descriptor

Explanation

31:0

I/O Update Rate

Ineffective unless CFR2<23> = 1. This 32-bit number controls the automatic I/O update

rate (see the Automatic I/O Update section for details). Default is 0xFFFFFFFF.

Frequency Tuning Word Register (FTW)

Address 0x07, 4 bytes are assigned to this register.

Table 22. Bit Descriptions for FTW Register

Bit(s)

Descriptor

Explanation

31:0

Frequency Tuning Word

32-bit frequency tuning word.

Phase Offset Word Register (POW)

Address 0x08, 2 bytes are assigned to this register.

Table 23. Bit Descriptions for POW Register

Bit(s)

Descriptor

Explanation

15:0

Phase Offset Word

16-bit phase offset word.

Amplitude Scale Factor Register (ASF)

Address 0x09, 4 bytes are assigned to this register.

Table 24. Bit Descriptions for ASF Register

Bit(s)

Descriptor

Explanation

31:16

Amplitude Ramp Rate

16-bit amplitude ramp rate value. Effective only if CFR1<9:8> = 112; see the Output Shift

Keying (OSK) section for details.

15:2

Amplitude Scale Factor

14-bit amplitude scale factor.

1:0

Amplitude Step Size

Effective only if CFR1<9:8> = 112; see the Output Shift Keying (OSK) section for details.

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