VM6101 datasheet(3/17 Pages) STMICROELECTRONICS

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VM6101

Pin description

3/17

Pin description

Functional description

Figure 1.

Functional block diagram

Table 1.

Pin description

Name

Type

Description

SDA

I/O

Serial interface data. Requires external pull-up to VDD.

SCL

I/O

Serial interface clock. Requires external pull-up to VDD.

INT

I/O

Dual function output:

- Comparator logic output

- PWM generator output

Input for serial interface 7-bit address select:

- low = address 0x10 (default)

- high = address 0x11

Requires external pull-up or pull-down resistor (1 M

Ω typically).

GND

PWR Ground

VDD

PWR Positive power supply

6PD

AIN

Power down control:

- low = force low power standby

- high = normal operation

AMUX

AIO

Reserved. Do not connect.

TEST

AIN

Reserved. Connect to GND.

SDA

SCL

Light to

Frequency

Converter

(x4)

27-bit

(x4)

Counter

3.6 MHz

Oscillator

Power-on

Reset

Bank

Serial

Interface

PWM

Generator

Comparator

Logic

INT

Function

Mux

VDD

GND

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