MC13201 Technical Data, Rev. 1.1,

10

Freescale Semiconductor

Figure 6 shows a typical AC parameter evaluation circuit.

Figure 6. RF Parametric Evaluation Circuit

6

Functional Description

The following sections provide a detailed description of the MC13201 functionality, including operating

modes, and the Serial Peripheral Interface (SPI).

6.1

MC13201 Operational Modes

The MC13201 has a number of operational modes that allow for low-current operation. Transition from

the Off to Idle mode occurs when RST is negated. Once in Idle, the SPI is active and is used to control the

IC. Transition to Hibernate and Doze modes is enabled via the SPI. These modes are summarized, along

with the transition times, in Table 7. Current drain in the various modes is listed in Table 3, DC Electrical

Characteristics.

Table 6. Digital Timing Specifications

(VBATT, VDDINT = 2.7 V, TA = 25 °C, frequency = 16 MHz, unless otherwise noted.

SPI timing parameters are referenced to Figure 8.

Symbol

Parameter

Min

Typ

Max

Unit

T0

SPICLK period

125

nS

T1

Pulse width, SPICLK low

50

nS

T2

Pulse width, SPICLK high

50

nS

T3

Delay time, MISO data valid from falling SPICLK

15

nS

T4

Setup time, CE low to rising SPICLK

15

nS

T5

Delay time, MISO valid from CE low

15

nS

T6

Setup time, MOSI valid to rising SPICLK

15

nS

T7

Hold time, MOSI valid from rising SPICLK

15

nS

RST minimum pulse width low (asserted)

250

nS

L2

6.8nH

5

1

6

2

3

4

Z1

LDB212G4005C-001

L3

3.9nH

C1

1.0pF

R1

0R

R2

0R

Not Mounted

2

5

3

4

J1

SMA_edge_Receptac

C2

10pF

ANT1

F_Antenna

PAO_M

6

PAO_P

5

RFIN_P

2

RFIN_M

1

CT_Bias

3

U5

MC1320x

L1

1.8nH

L4

1.8nH