OXCF950 datasheet(13/66 Pages) OXFORD

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DS-0027 Feb 06

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OXCF950 rev B DATA SHEET

OXFORD SEMICONDUCTOR, INC.

5 PCMCIA / CF TARGET CONTROLLER

5.1

Operation

Note: See section 0 for timing waveforms.

The OXCF950 responds to a number of different

CF/PCMCIA accesses (detailed below). Section 0 contains

timing diagrams and information for each of these types of

access.

•

Direct Common Memory read/writes: These are

required in Local Bus mode only to allow indirect

access to attribute memory. This type of access is

permitted before and after configuration to allow the

reading of the CIS information, but is only supported

by the PCMCIA specification. Only 8 bit data, even

byte accesses are performed to this memory as it is

only used for access to the indirect attribute memory.

If the host attempts to access an invalid address, the

value of 0xFF (null) is returned.

•

Direct Attribute Memory read/writes: Access to direct

attribute memory is required in both CF and PCMCIA

specifications. This memory space contains all the

configuration information for the device, as well as the

configuration registers. In CF systems, where only

direct access is permitted, this space is the only

memory space that is accessed by the host system. If

the host attempts to access common memory in this

mode, the device will return 0xFF telling the host that

there is no valid data in this space. In Local Bus

Mode, the direct attribute memory informs the host

that indirect access is enabled allowing the host to

perform indirect access to attribute memory, via

common memory. Valid data is 8 bits wide and on

even bytes only, for direct attribute memory (as

defined in the PCMCIA 7.1 standard)

•

Indirect Attribute Memory read/writes (Local Bus mode

only): Access to indirect attribute memory is

performed through direct common memory. This

allows the device to provide full functionality with only

4 address pins. This access is performed to read the

CIS and also read/write to configuration registers.

Valid data is 8 bit wide and on even bytes only, for

indirect attribute memory (as defined in the PCMCIA

7.1 standard).

•

IO read/writes: IO accesses are performed to access

the UART, local bus (Local Bus mode) and local

configuration registers. Data width is restricted to 8

bits, as required by the standard UART function. As

the device CIS information configures the card as a

single function device, no base addresses need to be

defined thus simplifying access to the function. As

reads and writes are immediate, there is no

requirement to hold the WAIT# signal in its active

state, thus providing maximum speed access to IO

space.

5.2

Configuration Space (Card Information

Structure)

5.2.1

Local Bus Mode Space Map

Direct

Indirect

Main CIS either:

a) Normal Default

b) Bluetooth Default

c) Custom CIS

(downloaded from

EEPROM)

0xFF

Common

(Valid at even

locations only)

0x00

0xFF

0x00

0xFF

Indirect Access

Hard Coded CIS to

link to indirect space

0x0F

0x10

0x0F

0x10

0x7F

0x80

Attribute

Function

Configuration

Registers

0xF6

0xF8

NOT VALID

Figure 4: Local Bus mode memory space map

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