MP1527

2A, 1.3MHz

Step-Up Converter

MP1527 Rev 1.8_8/31/05

Monolithic Power Systems, Inc.

3

Monolithic Power Systems

Pin Descriptions

COMP

NC

BP

EN

Top

View

PGND

PGND

SW

SW

1

2

3

4

12

11

10

9

1

2

3

4

5

6

7

14

13

12

11

10

9

8

NC

NC

IN

SW

PGND

SGND

FAULT

SGND

EN

BP

NC

COMP

FB

SS

Table 1: Pin Description

QFN

Pin

TSSOP

Pin

Name

Function

1

10

COMP

Compensation Node. COMP is the output of the internal transconductance error

amplifier. Connect a series RC network from COMP to SGND to compensate the

regulator control loop.

2, 6, 7

1, 2, 11

NC

No Connect

3

12

BP

Output of the internal 2.4V low dropout regulator.

Connect a 10nF bypass

capacitor between BP and SGND. Do not apply an external load to BP.

4

13

EN

regulator, a logic low puts the MP1527 into low current shutdown mode.

5, 13

6, 14

SGND

Signal Ground

8

3

IN

Input Supply

9, 10

4

SW

Output Switching Node. SW is the drain of the internal n-channel MOSFET.

Connect the inductor and rectifier to SW to complete the step-up converter.

11, 12

5

PGND

Power Ground

14

7

FAULT

detected a fault and shuts the regulator off once a fault is indicated. Connect the

when any one regulator detects a fault. Once a fault is detected, cycle EN or the

15

8

SS

Soft-Start Input. Connect a 10nF to 22nF capacitor from SS to SGND to set the

soft-start and fault timer periods.

SS sources 2

µA to an external soft-start

capacitor during start-up and when a fault is detected. As the voltage at SS

increases to 1.2V, the voltage at COMP is clamped to 0.7V above the voltage at

SS limiting the startup current. Under a fault condition, SS ramps at the same rate

regulator is disabled. The external capacitor at SS is discharged to ground when

not in use or when under voltage lockout or thermal shutdown occurs.

16

9

FB

Regulation Feedback Input. Connect to external resistive voltage divider from the

output voltage to FB to set output voltage.