4 of 8
RF6263
Rev A0 DS070622
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Package Drawing
Pin
Function
Description
Interface Schematic
1NC
No connection. Do not connect this pin to any external circuit.
2VREG
Regulated voltage supply for amplifier bias circuit. In power down mode,
both VREG and VMODE need to be LOW (<0.5V).
3VMODE
For nominal operation (High Power mode), VMODE is set LOW. When set
HIGH, devices are biased lower to improve efficiency.
4RF IN
RF input internally matched to 50
Ω. This input is internally AC-coupled.
5VCC1
First stage collector supply. A 2200pF and 4.7
μF decoupling capacitor are
required.
6NC
No connection. Do not connect this pin to any external circuit.
7NC
No connection. Do not connect this pin to any external circuit.
8NC
No connection. Do not connect this pin to any external circuit.
9VCC2
High power output stage collector supply. Refer to schematic for required
external components.
10
VCC2
Same as pin 9.
11
VCC2
Same as pin 9.
12
RF OUT
RF output. Internally AC-coupled.
13
NC
No connection. Do not connect this pin to any external circuit.
14
VCC2L
Low power output stage collector supply. Refer to schematic for required
external components.
15
NC
No connection. Do not connect this pin to any external circuit.
16
NC
No connection. Do not connect this pin to any external circuit.
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to a
top side ground pad which is connected to the ground plane with multiple
vias. The pad should have a short thermal path to the ground plane.
B
3.00
A
3.00
Pin 1 ID
2 PLCS
0.15 C
2 PLCS
0.15 C
0.203 REF
0.102 REF
0.08 C
C
0.08 C
0.925
0.775
1.45
0.05
0.28
0.18
TYP
Pin 1 ID
0.50 TYP
0.40
0.20
TYP
0.10
C AB
M
1.45
Shaded areas represent pin 1.
Dimensions in mm.
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