IRFS3307ZPBF datasheet(7/11 Pages) IRF

7 / 11 page

IRFB/S/SL3307ZPbF

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Fig 22a. Switching Time Test Circuit

Fig 22b. Switching Time Waveforms

90%

10%

d(on)

d(off)

Pulse Width < 1µs

Duty Factor < 0.1%

D.U.T

Fig 21b. Unclamped Inductive Waveforms

Fig 21a. Unclamped Inductive Test Circuit

V(BR)DSS

IAS

0.01

Ω

D.U.T

VDS

- VDD

DRIVER

15V

20V

VGS

Fig 23a. Gate Charge Test Circuit

Fig 23b. Gate Charge Waveform

Vds

Vgs

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

Fig 20.

Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

VCC

DUT

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple

≤ 5%

Body Diode

Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D =

P.W.

Period

* VGS = 5V for Logic Level Devices

VDD

• dv/dt controlled by RG

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T

Inductor Current

IRFS3307ZPBF Datenblatt(PDF) 7 Page - International Rectifier

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