LT1016IS8 datasheet(12/20 Pages) LINER

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LT1016

APPLICATIO S I FOR ATIO

Another output-caused fault is shown in Figure 13. The

output transitions are initially correct but end in a ringing

condition. The key to the solution here is the ringing. What

is happening is caused by an output lead that is too long.

The output lead looks like an unterminated transmission

line at high frequencies and reflections occur. This ac-

counts for the abrupt reversal of direction on the leading

edge and the ringing. If the comparator is driving TTL this

may be acceptable, but other loads may not tolerate it. In

this instance, the direction reversal on the leading edge

might cause trouble in a fast TTL load.

Keep output lead

lengths short. If they get much longer than a few inches,

terminate with a resistor (typically 250

W to 400W).

200ns-0.01% Sample-and-Hold Circuit

Figure 14’s circuit uses the LT1016’s high speed to

improve upon a standard circuit function. The 200ns

acquisition time is well beyond monolithic sample-and-

hold capabilities. Other specifications exceed the best

commercial unit’s performance. This circuit also gets

around many of the problems associated with standard

sample-and-hold approaches, including FET switch errors

and amplifier settling time. To achieve this, the LT1016’s

high speed is used in a circuit which completely abandons

traditional sample-and-hold methods.

Important specifications for this circuit include:

Acquisition Time

<200ns

Common Mode Input Range

±3V

Droop

mV/ms

Hold Step

2mV

Hold Settling Time

15ns

Feedthrough Rejection

>>100dB

When the sample-and-hold line goes low, a linear ramp

starts just below the input level and ramps upward. When

the ramp voltage reaches the input voltage, A1 shuts off

the ramp, latches itself off and sends out a signal indicat-

ing sampling is complete.

–

DELAY

COMP

1N4148

8pF

100

Ω

390

Ω

470

Ω

100

Ω

100

Ω

300

Ω

2N5160

2N2369

2N2222

2N2907A

5.1k

1.5k

0.1

µF

1000pF

(POLYSTYRENE)

390

Ω

SN7402

NOW

LT1016

SAMPLE-HOLD

COMMAND (TTL)

OUTPUT

–5V

–15V

INPUT

±3V

220

Ω

1.5k

2N2222

LT1009

2.5V

820

Ω

1016 F14

2N5486

LATCH

2N2907A

Figure 14. 200ns Sample-and-Hold

Figure 13. Lengthy, Unterminated Output Lines

Ring from Reflections

1V/DIV

50ns/DIV

1016 F13

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