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STPMIC25BPQR Datenblatt(PDF) 36 Page - STMicroelectronics |
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STPMIC25BPQR Datenblatt(HTML) 36 Page - STMicroelectronics |
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36 / 145 page ![]() 5 Feature descriptions 5.1 Functional state machine Overview STPMIC25 integrates advanced low power features controlled by the application processor through I²C, six digital control pins (PONKEYn, WAKEUPn, PWRCTRL1/2/3, and RSTn) and one interrupt output line (INTn). The main parameter settings can be programmed in a non-volatile memory (NVM) as default values at the startup time. See Section 5.5.2 All regulators can be independently controlled from the PWRCTRLx pins. This allows flexible configuration and a fast transition between different power strategies at the application level. Other features are provided to fulfill high-end application processors and advanced operating system needs: • Multiple turn-on/turn-off conditions • Mask_reset and restart_request options • Overcurrent and overvoltage protection • Thermal protection • Watchdog • Interrupt controller • Safety management • STANDBY ⇔ RUN states PMIC state machine - STPMIC25 state machine is described in Figure 10 STPMIC25 Feature descriptions DS14278 - Rev 3 page 36/145 |
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