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EV-RPG2-ENZ Datenblatt(PDF) 15 Page - Analog Devices

Teilenummer EV-RPG2-ENZ
Bauteilbeschribung  Multiprotocol Two-Port Industrial Ethernet Platform: Module and Embedded Design Solutions with Precertified Protocols
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EV-RPG2-ENZ Datenblatt(HTML) 15 Page - Analog Devices

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Data Sheet
ADIN2299
THEORY OF OPERATION
analog.com
Rev. D | 15 of 21
The general recommendation is to configure the SPI leader to
interrupt on a rising edge of this signal. However, RREQ can
also be polled, if using interrupts is not possible or desired.
RREQ is only related to read operations. RREQ is not related
to write operations in any form. RREQ may go active (high)
anytime, including during a write operation.
See Figure 9 for a sample SPI transaction.
For the busy signal, there are some values that can be expected
regarding the timing of these signals (see Table 13).
The data detailed in Table 13 was gathered empirically and other
factors, such as the application processor code and environment,
can influence these numbers.
An example of a write transaction and a read transaction with
actual data is shown in Figure 10 and Figure 11, respectively.
The transaction is an NI_Discover message with the UI_EchoReq
and UI_EchoRes message, which is detailed in the code for the
ni-api-srv found in the NI-Example-App workspace in the Developer
Portal.
Figure 9. Sample SPI Transaction
Table 13. SPI Timing Requirements
Parameter
Minimum (μs)
Maximum (μs)
BUSY Activation Time, tBUSY_ACTIVATION
1.14
27.04
BUSY Active Time, tBUSY_ACTIVE
3.34
33.04
Wrap-Up Time, tWRAP_UP
4.48
36.16
Figure 10. General and Specific SPI Write Example
Figure 11. General and Specific SPI Read Example



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