Data Sheet

AD9912

I/O REGISTER MAP

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Rev. G | 31 of 38

Table 12. (Continued)

Addr (Hex) Type1

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

(Hex)

Doubler and output drivers

0x0200

HSTL driver

OPOL

(polarity)

HSTL output doubler,

Bits[1:0]

0x05

0x0201

CMOS driver

CMOS mux

0x00

Calibration (user-accessible trim)

0x0400 to

0x040A

Reserved

0x00

0x040B

DAC full-scale

current

DAC full-scale current, Bits[7:0]

0xFF

0x040C

DAC full-scale current,

Bits[9:8]

0x01

0x040D

Reserved

0x00

0x040E

Reserved

0x10

0x040F

and

0x0410

Reserved

0x00

Harmonic spur reduction

0x0500

M

Spur A

HSR-A

enable

Amplitude

gain × 2

Spur A harmonic, Bits[3:0]

0x00

0x0501

M

Spur A magnitude, Bits[7:0]

0x00

0x0503

M

Spur A phase, Bits[7:0]

0x00

0x0504

M

Spur A

phase, Bit 8

0x00

0x0505

M

Spur B

HSR-B

enable

Amplitude

gain × 2

Spur B harmonic, Bits[3:0]

0x00

0x0506

M

Spur B magnitude, Bits[7:0]

0x00

0x0508

M

Spur B phase, Bits[7:0]

0x00

0x0509

M

Spur B

phase, Bit 8

0x00

1 Types of registers: M = mirrored (also called buffered). This type of register needs an I/O update for the new value to take effect; RO = read-only; AC = autoclear.