
Single-PLL General-Purpose
EPROM Programmable Clock Generator
CY2071A
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
, CA 95134-1709
•
408-943-2600
Document #: 38-07139 Rev. *D
Revised August 3, 2006
Features
• Single phase-locked loop architecture
• EPROM programmability
• Factory-programmable (CY2071A, CY2071AI) or
field-programmable (CY2071AF, CY2071AFI) device
options
• Up to three configurable outputs
• Low skew, low jitter, high-accuracy outputs
• Internal loop filter
• Power management (OE)
• Frequency select options
• Configurable 5V or 3.3V operation
• 8-pin 150-mil SOIC package
Benefits
• Generates a custom frequency from an external source
• Easy customization and fast turnaround
• Programming support available for all opportunities
• Generates three related frequencies from a single device
• Meets critical industry standard timing requirements
• Alleviates the need for external components
• Supports low-power applications
• Three outputs with two user-selectable frequencies
• Supports industry standard design platforms
• Industry standard packaging saves on board space
Selector Guide
Part Number
Outputs
Input Frequency Range
Output Frequency Range
Specifics
CY2071A
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–130 MHz (5V)
500 kHz–100 MHz (3.3V)
Factory Programmable
Commercial Temperature
CY2071AI
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–100 MHz (5V)
500 kHz–80 MHz (3.3V)
Factory Programmable
Industrial Temperature
CY2071AF
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–100 MHz (5V)
500 kHz–80 MHz (3.3V)
Field Programmable
Commercial Temperature
CY2071AFI
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–90 MHz (5V)
500 kHz–66.6 MHz (3.3V)
Field Programmable
Industrial Temperature
1
2
3
4
5
8
7
6
CLKA
GND
XTALIN
XTALOUT
VDD
OE/FS
CLKC
CLKB
XTALOUT
XTALIN
REFERENCE
OSCILLATOR
PLL
Block
CLKA
CLKB
CLKC
EPROM-
Configurable
Multiplexer
and Divide
Logic
OE / FS
Logic Block Diagram for CY2071A
Top View
8-pin SOIC
Pin Configuration
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