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CSPNL Datenblatt(PDF) 2 Page - Amkor Technology

Teilenummer CSPNL
Bauteilbeschribung  Wafer Level Packaging
PDF  2 Pages
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Hersteller  AMKOR [Amkor Technology]
Direct Link  http://www.amkor.com
Logo AMKOR - Amkor Technology

CSPNL Datenblatt(HTML) 2 Page - Amkor Technology

  CSPNL Datasheet HTML 1Page - Amkor Technology CSPNL Datasheet HTML 2Page - Amkor Technology  
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CSPnl™
data sheet
With respect to the information in this document, Amkor makes no guarantee or warranty of its accuracy or that the use of such information will not infringe upon the intellectual rights of third parties. Amkor shall not be responsible for any loss or
damage of whatever nature resulting from the use of, or reliance upon it and no patent or other license is implied hereby. This document does not in any way extend or modify Amkor’s warranty on any product beyond that set forth in its standard
terms and conditions of sale. Amkor reserves the right to make changes in its product and specifications at any time and without notice.
www.amkor.com
Process Highlights
Die thickness
0.27mm - 0.45 mm
Redistribution
12 µm line (typ.), 26 µm space (typ.)
Solder sphere diameter 300 µm (typ.), 250 µm (optional)
Bump height
250 µm (typ.), 210 µm (optional)
Solder ball pitch
0.50 mm (typ.), 0.40 mm (optional)
Visual inspection
Wafer map output
Standard Materials
Dielectric material
Polyimide
RDL
Copper
UBM
Ti/Cu/Ni, TiW/Cu/Ni
Solder Composition
Ball Loaded:
Pb-Free (Sn/3.9Ag/0.6Cu), Eutectic (63Sn/37Pb),
High Pb (5Sn/95Pb)
Electroplated:
Pb-Free (97.5Sn/2.5Ag), Eutectic (63Sn/37Pb),
High Pb (5Sn/95Pb)
Test Services
The CSPnl™ format allows for wafer sort integration resulting
in reduced cost and improved cycle-time for the customer.
Shipping
CSPnl™ packaged devices are shipped in standard wafer
magazines or may be singulated for shipment in tape or tray.
CSPnl™ Cross Sections
WAFER LEVEL PACKAGING
Direct Bump on Pad with Repassivation
Bump on Repassivation/Redistribution
Design
Layout
Mask tooling
Manufacturing
Thin film dielectric and metal patterning
Wafer bumping (electroplated and sphere placement)
Automated visual inspection
Wafer map generation
Test
Test software and hardware development
Probe card design, service, and support
Test program transfer
Wafer sort for memory, logic, and analog applications
Die Processing Integration
and Support
Wafer saw
Visual inspection
Wafer map integration
PnP to tape or tray
Shipping material design and supply management
Turnkey solutions
Drop ship to final customer
Capabilities and Services
Bump on Thick Repassivation/Redistribution



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