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STR750FV0 Datenblatt(PDF) 37 Page - STMicroelectronics |
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STR750FV0 Datenblatt(HTML) 37 Page - STMicroelectronics |
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37 / 81 page ![]() STR750Fxx STR751Fxx STR752Fxx STR755Fxx Electrical parameters 37/81 Table 14. Maximum power consumption in STOP and STANDBY modes Symbol Parameter Conditions(1) Typ(2) Max(3) Unit TA 25°C TA 85°C TA 105°C IDD Supply current in STOP mode LP_PARAM bits: ALL OFF(4) Single supply scheme see Figure 12. 3.3V range 12 16 117 250 µA LP_PARAM bits: ALL OFF Dual supply scheme see Figure 13. IDD_V18 IDD_V33 5 <1 8 3 60 20 110 26 µA LP_PARAM bits: ALL OFF(4) Single supply scheme see Figure 10 5V range 15 22 160 310 µA LP_PARAM bits: ALL OFF Dual supply scheme see Figure 11 IDD_V18 IDD_V50 5 3 8 6 60 50 110 65 µA Supply current in STANDBY mode RTC OFF 3.3 V range 10 20 25 28 5V range 15 25 30 33 1. The conditions for these consumption measurements are described at the beginning of Section 5.3.4. 2. Typical data are based on TA=25°C, VDD_IO=3.3V or 5.0V and V18=1.8V unless otherwise specified. 3. Data based on product characterisation, tested in production at VDD_IO max and V18 max (1.95V in dual supply mode or regulator output value in single supply mode). 4. In this mode, the whole digital circuitry is powered internally by the LPVREG at approximately 1.4V, which significantly reduces the leakage currents. |
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