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ZXLD1362 Datenblatt(PDF) 3 Page - Zetex Semiconductors |
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ZXLD1362 Datenblatt(HTML) 3 Page - Zetex Semiconductors |
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3 / 32 page ![]() ZXLD1362 Provisional version B - July 2007 3 www.zetex.com © Zetex Semiconductors plc 2007 Electrical characteristics (test conditions: VIN=24V, Tamb=25°C unless otherwise stated) (cont.) Symbol Parameter Conditions Min. Typ. Max. Unit VADJon DC voltage on ADJ pin to switch device from quiescent (off) state to active (on) state VADJ rising 0.2 0.25 0.3 V RADJ Resistance between ADJ pin and VREF 0< VADJ < VREF VADJ > VREF +100mV 30 13.5 50 20 65 25 k ILXmean Continuous LX switch current 1 A RLX LX Switch ‘On’ resistance @ ILX = 1 A 0.5 1.0 ILX(leak) LX switch leakage current 5 A DPWM(LF) Duty cycle range of PWM signal applied to ADJ pin during low frequency PWM dimming mode PWM frequency <300Hz PWM amplitude = VREF Measured on ADJ pin 0.001 1 Brightness control range 1000:1 DCADJ (*) NOTES: (*) Ratio of maximum brightness to minimum brightness before shutdown VREF = 1.25/0.3. VREF externally driven to 2.5V, ratio 10:1. DC Brightness control range See note (*) 5:1 TSS Soft start time Time taken for output current to reach 90% of final value after voltage on ADJ pin has risen above 0.3V Requires external capacitor 22nF. See graphs for more details 2ms fLX Operating frequency (See graphs for more detail) ADJ pin floating L = 68 H (0.1 ) IOUT = 1A @ VLED = 3.6V Driving 3 LEDs 260 KHz TONmin Minimum switch ‘ON’ time LX switch ‘ON’ 240 (†) (†) Parameters are not tested at production. Parameters are guaranteed by design, characterization and process control. TBD ns TOFFmin Minimum switch ‘OFF’ time LX switch ‘OFF’ 200 (†) TBD ns TONmin_REC Recommended minimum switch 'ON' time LX switch 'ON' 800 ns fLXmax Recommended maximum operating frequency 1MHz DLX Recommended duty cycle range of output switch at fLXmax 0.3 0.7 TPD Internal comparator propagation delay 50 ns |
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