L6566B datasheet(30/51 Pages) STMICROELECTRONICS

30 / 51 page

Application information

L6566B

30/51

Equation 8

where Lp is the inductance of the primary winding. In case a constant maximum power

capability vs. the input voltage is not required, the VFF pin can be grounded, directly or

through a resistor (see Section 5.11: OVP block on page 35), hence fixing the overcurrent

setpoint at 1V, or biased at a fixed voltage through a divider from VREF to get a lower

setpoint.

It is possible to bypass the pin to ground with a small film capacitor (e.g. 1-10 nF) to ensure

a clean operation of the IC even in a noisy environment.

The pin is internally forced to ground during UVLO, after activating any latched protection

and when pin COMP is pulled below its low clamp voltage (see Section 5.5: PWM control

block on page 26

5.7

Hiccup-mode OCP

A third comparator senses the voltage on the current sense input and shuts down the device

if the voltage on the pin exceeds 1.5 V, a level well above that of the maximum overcurrent

setpoint (1V). Such an anomalous condition is typically generated by either a short circuit of

the secondary rectifier or a shorted secondary winding or a hard-saturated flyback

transformer.

Figure 18. Hiccup-mode OCP: timing diagram

To distinguish an actual malfunction from a disturbance (e.g. induced during ESD tests), the

first time the comparator is tripped the protection circuit enters a “warning state”. If in the

next switching cycle the comparator is not tripped, a temporary disturbance is assumed and

the protection logic will be reset in its idle state; if the comparator will be tripped again a real

malfunction is assumed and the L6566B will be stopped. Depending on the time relationship

opt =

Vcc

(pin 5)

(pin 4)

OCP latch

VccON

VccOFF

Vccrestart

Secondary diode is shorted here

VCS

(pin 7)

Vcc_OK

1.5 V

L6566B Datenblatt(PDF) 30 Page - STMicroelectronics