GL816 USB 2.0 Flash Card Reader Controller

© 2004 Genesys Logic Inc. - All rights reserved.

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CHAPTER 5 FUNCTIONAL DESCRIPTION

5.1 UTM

The USB 2.0 Transceiver Macrocell, it’s the analog circuitry that handles the low level USB protocol and

signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the

general logic.

5.2 SIE

The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing

and state machine logic to handle USB packets and transactions.

5.3 EP0 FIFO

It is composed of TX0FIFO and RX0FIFO, with 64-byte FIFO each, and it is used for endpoint 0 data transfer.

5.4 EP3 FIFO

It’s an 8-byte FIFO for endpoint 3.

5.5 Bulk FIFO

It is composed of TXFIFO and RXFIFO for data transmission and receiving respectively, also with different

modes support:

TXFIFO:

1. To ensure the continuous data transmission, TXFIFO includes 512 bytes DATA-A FIFO, 512 bytes

DATA-B FIFO, and two 16 bytes corresponding redundant areas. All can be directly accessed by 8051

µC.

2. Normally SIE popes data, MHE pushes data for DATA A/B FIFOs, and redundant area is pushed by MHE

when SmartMedia MIF is enabled and popped by uC.

3. Supports uC single byte access for SmartMedia ECC error correction.

4. At transmit mode SIE won’t transmit data filled in TXFIFO before uC complete the data integrity

checking.

RXFIFO:

1. To ensure the continuous data transmission, RXFIFO includes 512 bytes DATA-A FIFO, 512 bytes

DATA-B FIFO, and 16 bytes single redundant area. All can be directly accessed by 8051 µC.

2. Normally MHE popes data, SIE pushes data for DATA A/B FIFOs, and redundant area is pushed by uC

and popped by MHE when SmartMedia MIF is enabled.

Buffer Mode:

1. Buffer mode is enabled by firmware and is used to copy data block from source to destination in same

card for SmartMedia or MemoryStick applications.

2. Under Buffer mode, firmware can enable MIF to read source data block to TXFIFO, check the data

integrity, then enable MIF to write data in TXFIFO to destination data block space on memory card.

3. For SmartMedia application, the redundant data write to destination data block space is from redundant

area of RXFIFO.

5.6 MHE (Media Hardware Engine)

The Media Hardware Engine contains 4 MIF (Media Interface), MHE control and MCFIFO.

1. MIF (Media Interface): There are PCMCIA MIF, SmartMedia MIF, MemoryStick MIF, and Secure

Digital/ Multi Media Card MIF in MHE.

2. MCFIFO (Media Control FIFO): It’s a 64-byte FIFO that shared by MemoryStick and SD/ MMC MIF.

In MemoryStick application, the MCFIFO is used for register read and write function; In SD/ MMC

application, it is used for command and response.