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PM6680TR Datenblatt(PDF) 39 Page - STMicroelectronics |
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PM6680TR Datenblatt(HTML) 39 Page - STMicroelectronics |
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39 / 49 page ![]() PM6680 Device description 39/49 The T node voltage is the sum of the output voltage and the triangular waveform generated by the virtual ESR network. In fact the virtual ESR network behaves like a further equivalent ESR RESR. A good trade-off is to design the network in order to achieve an RESR given by: Equation 28 where ∆I L is the inductor current ripple and VRIPPLE is the overall ripple of the T node voltage. It should be chosen higher than approximately 30mV. The new closed loop gain depends on CINT. In order to ensure stability it must be verified that: Equation 29 Where: Equation 30 where RTOT is the sum of the ESR of the output capacitor Rout and the equivalent ESR given by the virtual ESR network RESR. Moreover CINT must meet the following condition: Equation 31 Where k is a free design parameter greater than 3 and determines the minimum integrator capacitor value CINT: Equation 32 C must be selected as shown: Equation 33 out L RIPPLE ESR R I V R − ∆ = OUT Z m INT V Vr f 2 g C × × π > TOT out Z R C 2 1 f × × π = TOT out Z sw R C 2 k f k f × × π = × > OUT Z sw m INT V Vr f k f 2 g C × ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ − × π > INT C 5 C × > |
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