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DSP56303 Datenblatt(PDF) 69 Page - Freescale Semiconductor, Inc |
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DSP56303 Datenblatt(HTML) 69 Page - Freescale Semiconductor, Inc |
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69 / 292 page ![]() Central Processor Unit (CPU) Registers DSP56303 User’s Manual, Rev. 2 Freescale Semiconductor 4-11 5E1 Extension Cleared if all the bits of the integer portion of the 56-bit result are all ones or all zeros; otherwise, this bit is set. The Scaling mode defines the integer portion. If the E bit is cleared, then the low-order fraction portion contains all the significant bits; the high-order integer portion is sign extension. In this case, the accumulator extension register can be ignored. If the E bit is set, it indicates that the accumulator extension register is in use. S1 S0 Scaling Mode Integer Portion 0 0 No scaling Bits 55–47 0 1 Scale down Bits 55–48 1 0 Scale up Bits 5–46 1 1 Reserved Undefined 4U0 Unnormalized Set if the two MSBs of the Most Significant Portion (MSP) of the result are identical; otherwise, this bit is cleared. The MSP portion of the A or B accumulators is defined by the Scaling mode. S1 S0 Scaling Mode Integer Portion 0 0 No scaling U = (Bit 47 XOR Bit 46) 0 1 Scale down U = (Bit 48 XOR Bit 47) 1 0 Scale up U = (Bit 46 XOR Bit 45) 1 1 Reserved U undefined 3N0 Negative Set if the MSB of the result is set; otherwise, this bit is cleared. 2Z0 Zero Set if the result equals zero; otherwise, this bit is cleared. 1V0 Overflow Set if an arithmetic overflow occurs in the 56-bit result; otherwise, this bit is cleared. V indicates that the result cannot be represented in the accumulator register (that is, the register overflowed). In Arithmetic Saturation mode, an arithmetic overflow occurs if the Data ALU result is not representable in the accumulator without the extension part (that is, 48-bit accumulator or the 32-bit accumulator in Arithmetic Sixteen-bit mode). 0C0 Carry Set if a carry is generated by the MSB resulting from an addition operation. This bit is also set if a borrow is generated in a subtraction operation; otherwise, this bit is cleared. The carry or borrow is generated from Bit 55 of the result. The C bit is also affected by bit manipulation, rotate, and shift instructions. Table 4-2. Status Register Bit Definitions (Continued) Bit Number Bit Name Reset Value Description |
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