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TMP89FS60 Datenblatt(PDF) 5 Page - Toshiba Semiconductor |
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TMP89FS60 Datenblatt(HTML) 5 Page - Toshiba Semiconductor |
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5 / 410 page ![]() i Table of Contents TMP89FS60 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.4 Pin Names and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2. CPU Core 2.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Memory space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.1 Code area ................................................................................................................................................. 9 2.2.1.1 RAM 2.2.1.2 BOOTROM 2.2.1.3 Flash 2.2.2 Data area ................................................................................................................................................ 12 2.2.2.1 SFR 2.2.2.2 RAM 2.2.2.3 BOOTROM 2.2.2.4 Flash 2.3 System clock controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.3.1 Configuration .......................................................................................................................................... 15 2.3.2 Control .................................................................................................................................................... 15 2.3.3 Functions ................................................................................................................................................ 17 2.3.3.1 Clock generator 2.3.3.2 Clock gear 2.3.3.3 Timing generator 2.3.4 Warm-up counter .................................................................................................................................... 20 2.3.4.1 Warm-up counter operation when the oscillation is enabled by the hardware 2.3.4.2 Warm-up counter operation when the oscillation is enabled by the software 2.3.5 Operation mode control circuit................................................................................................................ 22 2.3.5.1 Single-clock mode 2.3.5.2 Dual-clock mode 2.3.5.3 STOP mode 2.3.5.4 Transition of operation modes 2.3.6 Operation Mode Control ......................................................................................................................... 27 2.3.6.1 STOP mode 2.3.6.2 IDLE1/2 and SLEEP1 modes 2.3.6.3 IDLE0 and SLEEP0 modes 2.3.6.4 SLOW mode 2.4 Reset Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 2.4.1 Configuration .......................................................................................................................................... 38 2.4.2 Control .................................................................................................................................................... 38 2.4.3 Functions ................................................................................................................................................ 40 2.4.4 Reset Signal Generating Factors............................................................................................................ 41 2.4.4.1 External reset input (RESET pin input) 2.4.4.2 Power-on reset 2.4.4.3 Voltage detection reset 2.4.4.4 Watchdog timer reset 2.4.4.5 System clock reset 2.4.4.6 Trimming data reset 2.4.4.7 Flash standby reset 2.4.4.8 Internal factor reset detection status register 2.4.4.9 How to use the external reset input pin as a port 2.5 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 |
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