TMP93CS41 datasheet(88/248 Pages) TOSHIBA

88 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-86

Port A Register

Bit symbol

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

(001EH)

Read/Write

R/W

After reset

Function

Input mode

Port A Control Register

PACR

Bit symbol

PA7C

PA6C

PA5C

PA4C

PA3C

PA2C

PA1C

PA0C

(001FH)

Read/Write

After reset

Function

0: Input

1: Output

Clock Output Control Register

CKOCR

Bit symbol

SCOSEL

SCOEN

ALEEN

CLKEN

(006DH)

Read/Write

R/W

After reset

0/1

Function

Clock select Clock enable ALE enable CLK enable

Figure 3.5.29 Registers for Port A

CLK pin output control (Note 1)

High impedance

CLK output

ALE pin output control (Note 1)

High impedance

ALE output

PACR<PA7C>

Output mode

fFPH clock output (Note 3)

Input Port

fSYS clock output (Note 3)

SCOUT/PA7 pin control

Note 1: Read-modify-write is prohibited for registers PACR.

Note 2: The value after reset of <CLKEN>, <ALEEN> is following:

TMP93CS40: “0” (High-impedance output)

TMP93CS41: “1” (CLK or ALE output)

But during reset, the CLK pin is pulled up internally regardless of which

of these two microcontrollers is in use.

Note 3: The output clock from the SCOUT pin is as fFPH or fSYS clock signal.

e.g.

The case of a 20 MHz oscillator connected to the X1 and X2 pins.

= “0” → 20 MHz clock

= “1” → 10 MHz clock

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