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HCF4097B Datenblatt(PDF) 7 Page - STMicroelectronics

Teilenummer HCF4097B
Bauteilbeschribung  ANALOG DIFFERENTIAL 8 CHANNEL MULTIPLEXER/DEMULTIPLEXER
PDF  10 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

HCF4097B Datenblatt(HTML) 7 Page - STMicroelectronics

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APPLICATION INFORMATION
In applications where separate power sources are
used to drive VDD and the signal inputs, the VDD
current capability should exceed VDD/RL (RL =
effective external load). This provision avoids
permanent current flow or clamp action on the
VDD supply when power is applied or removed
from the HCF4097B.
When switching from one address to another,
some of the ON periods of the channels of the
multiplexers will overlap momentarily, which may
be objectionable in certain applications. Also,
when a channel is turned ON or OFF by an
address input, there is a momentary conductive
path from the channel to VSS, which will dump
some charge from any capacitor connected to the
input or output of the channel. The inhibit input
turning on a channel will similarly dump some
charge to VSS.
The amount of charge dumped is mostly a
function of the signal level above VSS. Typically, at
VDD - VSS = 10V, a 100 pF capacitor connected to
the input or output of the channel will lose 3-4% of
its voltage at the moment the channel turns ON or
OFF.
This
loss
of
voltage
is
essentially
independent of the address or inhibit signal
transition time, if the transition time is less than 1-
2 ms. When the inhibit signal turns a channel off,
there is no change dumping of VSS. Rather, there
is a slight rise in the channel voltage level (65 mV
typ.) due to the capacitance coupling from inhibit
input to channel input or output. Address input
also couple some voltage steps onto the channel
signal levels.
In certain applications, the external load-resistor
current may include both VDD and signal line
components. To avoid drawing VDD current when
switch current flows into the transmission gate
inputs, the voltage drop across the bidirectional
switch must not exceed 0.8V (calculated from RON
values
shown
in
ELECTRICAL
CHARACTERISTICS CHART). No VDD current
will flow through RL if the switch current flows into
terminal 1 on the HCF4097B.
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = 200KΩ
RT = ZOUT of pulse generator (typically 50Ω)



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