Power Cycle Hysteresis (ppm)

0

10

20

30

40

0

0.05

0.1

0.15

0.2

0.25

0.3

Figure 8-2. Power Cycle Hysteresis

8.2 Temperature Drift

The REF80 has integrated on chip heater, which is factory programmed to TSET = 115°C temperature. Heater

regulates the TSET temperature to ±1°C for entire operating temperature range. This results in 0.05ppm/°C

temperature drift coefficient for REF80. Figure 6-2 shows temperature drift profile of 42 devices.

The temperature coefficient is calculated using the box method in which a box is formed by the min/max

variation for the nominal output voltage over the operating temperature range. REF80 has a maximum

temperature coefficient of 0.2ppm/°C for 0°C to70°C temperature range. The box method specifies limits for

the temperature error but does not specify the exact shape and slope of the device under test. See SLYT183 for

more information on the box method. The box method equation is shown in Equation 2:

Driftppm/°C =  VREFMAX −VREFMIN

VREF25°C × Temperature Range ×106

(2)

Figure 8-3. Temperature Drift Distribution

8.3 Thermal Hysteresis

Thermal hysteresis is measured with the REF80 soldered to a PCB, similar to a real-world application. Thermal

hysteresis for the device is defined as the change in output voltage after operating the device at 25°C, cycling

the device through the 0°C to 70°C temperature range, and returning to 25°C. Thermal hysteresis for REF80

reduces significantly from second cycle ownwards as shown in Figure 8-4 and Figure 8-5. Hysteresis can be

expressed by Equation 3

REF80

SNAS856A – SEPTEMBER 2024 – REVISED MARCH 2025

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