ACT4911 datasheet(21/33 Pages) QORVO

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Data Sheet Rev. C, August 2021 | Subject to change without notice

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ACT4911

Power Loss Protection with 6A eFuse

Table 3: Buck Current Limit

BK_CLIM[1:0]

ILIMSET (A)

5.0

6.0

7.0

9.0

A short circuit condition that results in the peak switch

current being 122.5% of BK_CLIM immediately shuts

down the supply and asserts nIRQ low.

A buck

overcurrent, undervoltage, or overvoltage condition

moves the IC into the UV/POR state.

Compensation

The

Buck

regulator

utilizes

type

external

compensation placed on the COMP pin. Contact the

factory for compensation details.

Input Capacitor Selection

The STR pin is the input voltage to the buck converter.

It requires a dedicated high quality, low-ESR, ceramic

input capacitor that is optimally placed to minimize the

power routing. For optimal PCB layout considerations,

1206 or 1210 sized input capacitors are recommended.

A 22uF capacitor is typically suitable, but the actual

value is application dependent. The input capacitor can

be increased without limit. Choose the input capacitor

value to keep the input voltage ripple less than 50mV

��=��×��×�1−��

��×��

(7)

Where Iout is the maximum eFuse load current in

Amperes, VSTR is the maximum storage voltage, FSW is

the switching frequency, and Vripple is the maximum

allowable ripple voltage on the input of the buck

converter. Note that the storage capacitor values should

not be considered when calculating the input voltage

ripple because they are not typically designed for high

frequency functionality.

Be sure to consider the input capacitor’s DC bias effects.

A capacitor’s actual capacitance is strongly affected by

its DC bias characteristics. The input capacitor is

typically an X5R, X7R, or similar dielectric. Use of Y5U,

Z5U, or similar dielectrics is not recommended. Input

capacitor placement is critical for proper operation. The

buck’s input capacitor must be placed as close to the IC

as possible. The traces from STR to the capacitor and

from the capacitor to PGND should as short and wide

as possible.

Inductor Selection

The Buck regulator utilizes current-mode control and a

proprietary

internal

compensation

scheme

simultaneously simplify external component selection

and optimize transient performance over their full

operating range. These ACT4911 is optimized for

operation with 1uH to 3.3uH inductors. Choose an

inductor with a low DC-resistance, and avoid inductor

saturation by choosing inductors with DC ratings that

exceed the maximum output current by at least 30%.

Due to the requirement for the buck converter to start

up as quickly as possible, the inductor should be

designed to give a maximum ripple current,

ΔIL, of 50%

to 60% of the maximum output current. The following

equation calculates the recommended inductor value.

��=�1−��×��

��×∆��

(8)

Where L is the inductor value in µH, VOUT is the output

voltage, VSTR is the maximum storage voltage, FSW is

the switching frequency in Hz, and

ΔIL is the desired

ripple current in Amperes.

Output Capacitor Selection

The buck converter is designed to take advantage of the

benefits of ceramic capacitors, namely small size and

very-low ESR. The buck converter is designed to

operate with 44µF output capacitor over most of its

operating ranges, although more capacitance may be

desired depending on the duty cycle and load step

requirements.

Choose

ripple

voltage

that

approximately 1% of the output voltage setpoint. Note

that the output capacitance must be placed at the output

the

buck

converter.

Additional

downstream

capacitance will be placed at the loads, but this

capacitance should not be considered when calculating

the buck output capacitance. However, the downstream

capacitance should be considered when compensating

the power supply. The following equation calculates the

output voltage ripple as a function of output capacitance.

Note that the worst case ripple voltage occurs at the

beginning of supplement mode when the storage

capacitors are fully charged.

��= ∆��

8×��×��

(9)

Where Vripple is the desired output ripple voltage, FSW is

the switching frequency in Hz, and

ΔIL is the maximum

ripple current in Amperes.

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