LM9071

www.ti.com

SNVS131D – DECEMBER 1999 – REVISED APRIL 2013

An output bypass capacitor of at least 10

μF is required for stability (47 μF is recommended). The ESR of this

capacitor should be less than 3

Ω. An input capacitor of 1 μF or larger is recommended to improve line transient

and noise performance.

Conventional load dump protection is built in to withstand up to +60V and

−50V transients. Protection against

reverse polarity battery connections is also built in. With a reversed battery connection the output of the LM9071

will not go more negative than one diode drop below ground. This will prevent damage to any of the 5V load

circuits.

RESET FLAG

Excessive loading of the output to the point where the output voltage drops by 300 mV to 500 mV will signal a

reset flag to the micro. This will warn of a VCC supply that may produce unpredictable operation of the system.

On power-up and recovery from a fault condition the delay capacitor is used to hold the micro in a reset condition

for a programmable time interval to allow the system operating voltages and clock to stabilize before executing

code. The delay time interval can be estimated by the following equation:

(1)

INPUT STABILITY

Low dropout voltage regulators which utilize a PNP power transistor usually exhibit a large increase in current

when in dropout (VIN < 5.5V). This increase is caused by the saturation characteristics (β reduction) of the PNP

transistor. To significantly minimize this increase in current the LM9071 detects when the PNP enters saturation

and reduces the operating current.

This reduction in input current can create a stability problem in applications with higher load current (> 100 mA)

where the input voltage is applied through a long length of wire, which in effect adds a significant amount of

inductance in series with the input. The drop in input current may create a positive input voltage transient which

may take the PNP out of saturation. If the input voltage is held constant at the threshold where the PNP is going

in and out of saturation, an oscillation may be created.

This is only observed where a large series inductance is present in the input supply line and when the rise and

fall time of the input supply is very slow. If the application and removal of the input voltage changes at a rate

greater than 500 mV/

μs it will move through the dropout region of the regulator (VIN of 3V to 5.5V) too quickly for

an oscillation to be established.

THERMAL MANAGEMENT

The LM9071 is packaged in both a TO-263 surface mount power package and a narrow lead-pitch TO-220

package. To obtain operation over the highest possible load current and input voltage ranges, care must be

taken to control the operating temperature of the device. Thermal shutdown protection is built in, with a threshold

above 150°C. Conventional heat-sinking techniques can be used with the TO-220 package. When applying the

TO-263 package, on board heat-sinking is important to prevent premature thermal shutdown. More copper foil

area under the tab of the device will directly improve the operating

θJ-A of the TO-263 package, which will reduce

the junction temperature of the device.

The

θJ-A value for the TO-263 package (still air, no additional heat sink) is rated at 80°C/W. The effective θJ-A

value of the TO-263 package can be reduced by increasing the printed circuit board area that is connected

(soldered) to the package tab. Using 1 ounce (1.4 mils thick) copper clad with no solder mask, an area of 0.5

square inches will reduce

θJ-A to 50°C/W, an area of 1.0 square inches will reduce θJ-Ato 37°C/W, and an area of

1.6 square inches will reduce

θJ-A to 32°C/W. If the printed circuit board uses a solder mask, the copper clad area

under the solder mask should be increased by at least 50% to maintain a similar

θJ-A rating.

The use of a double sided PC board with soldered filled vias between two planes of copper, as shown in

Figure 16, will improve thermal performance while optimizing the PC board surface area required. Using the

double sided PC board arrangement shown in Figure 16, with 1 ounce (1.4 mils thick) copper clad with no solder

mask and solder filled vias, an area of 0.5 square inches on both sides will reduce

θJ-A to 43°C/W.

Copyright © 1999–2013, Texas Instruments Incorporated

Submit Documentation Feedback

7

Product Folder Links: LM9071