LP3944

www.ti.com

SNVS264A – MAY 2004 – REVISED APRIL 2013

Electrical Characteristics

Unless otherwise noted, VDD = 5.5V. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing

in boldface type apply over the entire junction temperature range for operation, TJ = −40°C to +125°C.

(1)

Limit

Symbol

Parameter

Conditions

Typical

Units

Min

Max

POWER SUPPLY

VDD

Supply Voltage

5

2.3

5.5

V

IQ

Supply Current

No Load

350

550

µA

Standby

2.0

5

ΔIQ

Additional Standby Current

VDD = 5.5V, every LED pin at

2

mA

4.3V

VPOR

Power-On Reset Voltage

1.8

1.96

V

tw

Reset Pulse Width

10

ns

LED

VIL

LOW Level Input Voltage

−0.5

0.8

V

VIH

HIGH Level Input Voltage

2.0

5.5

V

IOL

Low Level Output Current(2)

VOL = 0.4V, VDD = 2.3V

9

VOL = 0.4V, VDD = 3.0V

12

VOL = 0.4V, VDD = 5.0V

15

mA

VOL = 0.7V, VDD = 2.3V

15

VOL = 0.7V, VDD = 3.0V

20

VOL = 0.7V, VDD = 5.0V

25

ILEAK

Input Leakage Current

VDD = 3.6, VIN = 0V or VDD

−1

1

µA

CI/O

Input/Output Capacitance

See(3)

2.6

5

pF

ALL DIGITAL PINS (EXCEPT SCL AND SDA PINS)

VIL

LOW Level Input Voltage

−0.5

0.8

V

VIH

HIGH Level Input Voltage

2.0

5.5

V

ILEAK

Input Leakage Current

−1

1

µA

CIN

Input Capacitance

VIN = 0V

(3)

2.3

5

pF

I2C INTERFACE (SCL AND SDA PINS)

VIL

LOW Level Input Voltage

-0.5

0.3VDD

V

VIH

HIGH Level Input Voltage

0.7VDD

5.5

V

VOL

LOW Level Output Voltage

0

0.2VDD

V

IOL

LOW Level Output Current

VOL = 0.4V

6.5

3

mA

FCLK

Clock Frequency

See(3)

400

kHz

tHOLD

Hold Time Repeated START

See(3)

0.6

µs

Condition

tCLK-LP

CLK Low Period

See(3)

1.3

µs

tCLK-HP

CLK High Period

See(3)

0.6

µs

tSU

Set-Up Time Repeated START

See(3)

0.6

µs

Condition

tDATA-HOLD

Data Hold Time

See(3)

300

ns

tDATA-SU

Data Set-Up Time

See(3)

100

ns

tSU

Set-Up Time for STOP Condition

See(3)

0.6

µs

tTRANS

Maximum Pulse Width of Spikes

See(3)

that Must Be Suppressed by the

50

ns

Input Filter of Both DATA & CLK

Signals

(1)

Limits are ensured. All electrical characteristics having room-temperature limits are tested during production with TJ = 25°C. All hot and

cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process

control.

(2)

Each LED pin should not exceed 25 mA and the package should not exceed a total of 200 mA.

(3)

Ensured by design.

Copyright © 2004–2013, Texas Instruments Incorporated

Submit Documentation Feedback

5

Product Folder Links: LP3944