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TLC320AD50C/I Datenblatt(PDF) 39 Page - Texas Instruments

Teilenummer TLC320AD50C/I
Bauteilbeschribung   Sigma-Delta Analog Interface Circuits With Master-Slave Function
PDF  54 Pages
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Hersteller  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TLC320AD50C/I Datenblatt(HTML) 39 Page - Texas Instruments

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4–6
4.4.2
Slave Mode Timing Requirements
MIN
NOM
MAX
UNIT
td4
Delay time, SCLK
↑ to FS↓
0
tsu2
Setup time, DIN, before SCLK low
20
th2
Hold time, DIN, after SCLK low
20
td(FL–FDL)
Delay time, FS low to FSD low, (see Figure 5–2)
40
ns
td(CH–FDL) Delay time, SCLK high to FSD low, slave mode (see Figure 5–3)
50
twH
Pulse duration, MCLK high
32
twL
Pulse duration, MCLK low
20
4.4.3
Master Mode Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td2
Delay time, SCLK
↑ to DOUT
20
ten1
Enable time, FS
↓ to DOUT
CL = 20 pF
25
ns
tdis1
Disable time, FS
↑ to DOUT Hi-Z
20
4.4.4
Slave Mode Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td5
Delay time, SCLK
↑ to DOUT
20
ten2
Enable time, FS
↓ to DOUT
CL = 20 pF
25
ns
tdis2
Disable time, FS
↑ to DOUT Hi-Z
20
4.4.5
Reset Timing
PARAMETER
MIN
TYP
MAX
UNIT
tPW
Reset pulsewidth
6 MCLKs
ns
4.4.6
Other
PARAMETER
MIN
TYP
MAX
UNIT
tsu3
Setup time, FC before FS
↑
10
ns
th3
Hold time, FC after FS
↑
10
ns



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