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IP175C/IP175C LF/IP175CH/IP175CH LF
Data Sheet
38/111
Mar 09, 2007
Copyright © 2004, IC Plus Corp.
IP175C/IP175CH-DS-R14
MII1 PHY mode (interface to an external MAC, MII registers can be accessed via MDC0, MDIO0)
The PHY address of MII1 PHY mode is 4.
EEPROM
MII register
Pin
Name
Reg
Name
Phy
Reg
MII1 speed/duplex/
pause
--
--
4
0~5
MII1 MAC mode (interface to an external PHY), there are two ways to set MII1’s speed, duplex and pause.
1. IP175C/IP175CH reads the MII registers 0~5 of external PHY through MDC1, MDIO1.
MII1
Speed
Duplex
Pause
1.
IP175C/IP175CH polls the external PHY with address defined in MII register
31.4[4:0]. The default address value is 00001.
2.
After reset, IP175C/IP175CH writes the speed/duplex/pause capability to the
external PHY using the content of MII register 31.4[12:8].
3.
IP175C/IP175CH reads MII register 0~5 of external PHY as MII1 speed,
duplex and pause continuously.
2. Force mode (MDC1 and MDIO1 are not connected to external PHY)
EEPROM
MII register
Pin
Name
Reg
Name
Phy
Reg
MII1 speed
P3_FORCE_100
P3_FORCE_100
20.3
P3_FORCE_100
29
22.9
MII1 duplex
P3_FORCE_FULL P3_FORCE_FULL
21.3
P3_FORCE_FULL
29
22.4
MII1 pause
--
MAC_X_EN
4.3
MAC_X_EN
29
18.10
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