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ISO7830FDWWR Datenblatt(PDF) 7 Page - Texas Instruments |
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ISO7830FDWWR Datenblatt(HTML) 7 Page - Texas Instruments |
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7 / 38 page ![]() 7 ISO7830, ISO7830F www.ti.com SLLSEO2B – JULY 2015 – REVISED JUNE 2016 Product Folder Links: ISO7830 ISO7830F Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated (1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications (2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. (3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. (4) All pins on each side of the barrier tied together creating a two-terminal device. 6.6 Insulation Characteristics PARAMETER TEST CONDITIONS SPECIFICATION UNIT DW DWW CLR External clearance(1) Shortest terminal-to-terminal distance through air >8 >14.5 mm CPG External creepage(1) Shortest terminal-to-terminal distance across the package surface >8 >14.5 mm DTI Distance through the insulation Minimum internal gap (internal clearance) >21 >21 μm CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112; UL 746A >600 >600 V Material group I I Overvoltage category per IEC 60664-1 Rated mains voltage ≤ 600 VRMS I–IV I–IV Rated mains voltage ≤ 1000 VRMS I–III I–IV DIN V VDE V 0884–10 (VDE V 0884–10):2006-12(2) VIOWM Maximum isolation working voltage Time dependent dielectric breakdown (TDDB) Test; see Figure 1 and Figure 2 1500 2000 VRMS 2121 2828 VDC VIOTM Maximum transient isolation voltage VTEST = VIOTM t = 60 s (qualification) t= 1 s (100% production) 8000 8000 VPK VIOSM Maximum surge isolation voltage for reinforced insulation(3) Test method per IEC 60065, 1.2/50 µs waveform, VTEST = 1.6 × VIOSM = 12800 VPK (qualification) 8000 8000 VPK VIORM Maximum repetitive peak isolation voltage 2121 2828 VPK VPR Input-to-output test voltage Method a, After Input/Output safety test subgroup 2/3, VPR = VIORM × 1.2, t = 10 s, Partial discharge < 5 pC 2545 3394 VPK Method a, After environmental tests subgroup 1, VPR = VIORM × 1.6, t = 10 s, Partial Discharge < 5 pC 3394 4525 Method b1, VPR = VIORM × 1.875, t = 1 s (100% Production test) Partial discharge < 5 pC 3977 5303 CIO Barrier capacitance, input to output(4) VIO = 0.4 × sin (2πft), f = 1 MHz ~1 ~1 pF RIO Isolation resistance, input to output(4) VIO = 500 V, TA = 25°C >1012 >1012 Ω VIO = 500 V, 100°C ≤ TA ≤ max >1011 >1011 Ω RS Isolation resistance VIO = 500 V at TS >109 >109 Ω Pollution degree 2 2 Climatic category 55/125/21 55/125/21 UL 1577 VISO Withstanding isolation voltage VTEST = VISO = 5700 VRMS, t = 60 s (qualification), VTEST = 1.2 × VISO = 6840 VRMS, t = 1 s (100% production) 5700 5700 VRMS |
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