10W

50W

OPA365

24pF

1000pF

1nF

10W

50W

OPA365

24pF

1000pF

+IN

-IN

ADS8317

10W

50W

OPA365

24pF

1000pF

50W

24pF

+IN

-IN

ADS8317

Single-Ended

Differential

V

CM

+

ADS8317

SBAS356D – JUNE 2007 – REVISED OCTOBER 2009 .................................................................................................................................................... www.ti.com

The input current on the analog inputs depends on a

REFERENCE INPUT

number of factors: sample rate, input voltage, and

The external reference sets the analog input range.

source impedance. Essentially, the current into the

The ADS8317 operates with a reference in the range

ADS8317 charges the internal capacitor array during

of 0.1V to VDD/2. There are several important

the sample period. After this capacitance has been

implications to this specification.

fully charged, there is no further input current. The

source of the analog input voltage must be able to

As the reference voltage is reduced, the analog

charge the input capacitance (24pF) to 16-bit settling

voltage weight of each digital output code is reduced.

level within 4.5 clock cycles. When the converter

This reduction is often referred to as the least

goes into the hold mode, or while it is in the

significant bit (LSB) size and is equal to the reference

power-down mode, the input impedance is greater

voltage divided by 65,536. This relationship means

than 1G

Ω.

that any offset or gain error inherent in the A/D

converter appears to increase (in terms of LSB size)

Care must be taken regarding the absolute analog

as the reference voltage is reduced. For a reference

input voltage. The +IN input should always remain

voltage of 2.5V, the value of the LSB is 76.3

μV, and

within the range of GND – 300mV to VDD + 300mW.

for a reference voltage of 1.25V, the LSB is 38.15

μV.

The –IN input should always remain within the range

of GND – 300mV to 4V. Outside of these ranges, the

The noise inherent in the converter also appears to

converter linearity may not meet specifications. To

increase with a lower LSB size. With a 2.5V

obtain maximum performance from the ADS8317, an

reference, the internal noise of the converter typically

input circuit such as that shown in Figure 42 is

contributes only 5LSB peak-to-peak of potential error

recommended.

to the output code. When the external reference is

1.25V, the potential error contribution from the

internal noise is almost two times larger (9LSB). The

errors arising from the internal noise are Gaussian in

nature and can be reduced by averaging consecutive

conversion results.

For

more

information

regarding

noise,

consult

Figure 18, Peak-to-Peak Noise for a DC Input vs

Reference Voltage. Note that the Effective Number Of

Bits (ENOB) figure is calculated based on the

converter signal-to-(noise + distortion) ratio with a

2kHz, 0dB input signal. SINAD is related to ENOB as

follows:

SINAD = 6.02 × ENOB + 1.76

With lower reference voltages, extra care should be

taken to provide a clean layout including adequate

bypassing,

a

clean

power

supply,

a

low-noise

reference, and a low-noise input signal. Due to the

lower LSB size, the converter is also more sensitive

to external sources of error, such as nearby digital

signals and electromagnetic interference.

Figure 42. Single-Ended and Differential Methods

of Interfacing the ADS8317

18

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